Sample MPW Readiness Report for a 180nm Mixed-Signal Prototype
This sample readiness report shows the kind of non-confidential output MST can prepare before an MPW request is routed for qualified partner review.
- →Answer-first summary
- →Sample project context
- →Readiness score
- →Recommended next questions
- →Suggested MST output
Answer-first summary
This sample MPW readiness report shows how a 180nm mixed-signal prototype can be evaluated before partner review without sharing GDS, RTL, netlists, source code, PDK files or proprietary design IP. The report is not a manufacturing commitment. It is a structured way to show what is ready, what is missing and what should be clarified before a partner-confirmed route is requested.
The sample below is fictional and non-confidential. It illustrates the kind of output MST can prepare from a public intake, readiness checker result or early engineering conversation.
Sample project context
| Application | Industrial sensor-interface ASIC for first-silicon validation |
|---|---|
| Target process | 180nm mixed-signal mature-node, alternatives acceptable if process fit is better |
| Die estimate | 4 mm x 4 mm preliminary estimate |
| Sample target | 50 packaged units for bench validation |
| Package assumption | QFN family, final pin count unknown |
| Design state | Schematic mostly complete; layout and DRC/LVS not final |
Readiness score
Overall status: preliminary but reviewable
The project is suitable for a non-confidential RFQ brief and process-fit screening. It is not ready for final tapeout-route review because die size, pad count, package, DRC/LVS and wafer-probe assumptions remain incomplete.
| Area | Score | Reason |
|---|---|---|
| Application clarity | Strong | Commercial industrial validation use case is clear at category level. |
| Process fit | Medium | Mixed-signal need is clear, but voltage, device and analog-performance assumptions need detail. |
| PDK/NDA path | Open | No route-specific NDA or PDK access path has been identified yet. |
| Package/test scope | Weak | Package family is tentative; probe and final-test expectations are incomplete. |
| Design readiness | Early | Layout and signoff evidence are not final, so GDS handoff is premature. |
Recommended next questions
Process-fit questions
- What voltage domains are required?
- Are special analog, high-voltage, NVM or RF options required?
- Is 180nm preferred because of device availability, cost, prior design reuse or package/test needs?
Package and test questions
- What is the expected pad count and package body target?
- Does the customer need wafer probe before packaging?
- What bench tests define first-silicon success?
- Are evaluation boards, sockets, fixtures or burn-in assumptions required?
Review-path questions
- Which legal entity will sign NDA if a route moves forward?
- Which customer contact can confirm end-use and country information?
- Which design team owns schematic, layout, DRC/LVS and release approval?
Suggested MST output
MST would prepare a no-GDS RFQ pack and a partner-review question set. The pack would include customer context, application, target node range, process-family assumptions, die estimate, sample target, package/test assumptions, missing fields, NDA/PDK path questions and requested partner response.
Boundary for this sample
This sample does not include route names, customer names, pricing, schedule, PDK details or sensitive design files. Those items require case-specific review, written permission where needed and the correct NDA path.
To create a similar first-screen report, use the MPW Readiness Checker or start an MPW RFQ intake with non-confidential information.
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