News & Insights

Technical Insights

Focused technical articles on MPW flow, PDK/NDA/GDS, package/test, P&ID, BOM context and native SOLIDWORKS assembly.

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Technical Insights

Aug 2026 Technical Insights

HHGrace MPW Alternatives When Capacity Is Constrained

Compare mature-node MPW fallback routes by preserved requirements, migration effort, evidence and fab-confirmed access—not node labels.

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Aug 2026 Technical Insights

HHGrace MPW PDK, NDA & Overseas Onboarding

Prepare the entity, users, tools, technology scope and secure exchange path needed for HHGrace NDA and PDK onboarding review.

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Aug 2026 Technical Insights

HHGrace MPW Cost & Quotation RFQ Brief

Build a non-confidential HHGrace MPW quotation brief before final GDS by defining scope, cost drivers, unknowns and confirmation gates.

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Aug 2026 Technical Insights

HHGrace MPW 55nm, 90nm & 40nm Process Fit

Screen HHGrace 55nm, 90nm and 40nm candidates by devices, voltage, eFlash, BCD, RF, IP and reliability before fab review.

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Aug 2026 Technical Insights

HHGrace MPW Schedule, Slot & Capacity Enquiry

Prepare an HHGrace MPW schedule, slot, data-in and capacity enquiry with exact timing definitions, evidence owners and fab-confirmed gates.

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Jul 2026 Technical Insights

BCD vs eFlash vs Logic CMOS vs SiGe BiCMOS: Which Process Fits Your Chip?

An engineering comparison of BCD, embedded flash, logic CMOS and SiGe BiCMOS using device, PDK, package, test and five buyer scenarios.

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Jul 2026 Technical Insights

Small-Batch Chip Manufacturing: Process, PDK, Packaging and Test

An end-to-end small-batch ASIC guide covering process choice, controlled PDK, design release, wafer fabrication, probe, dicing, packaging, test and qualification.

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Jul 2026 Technical Insights

How to Choose an MPW Shuttle Run

Choose an MPW run by process and PDK fit, exact deadline meanings, price basis, minimum area, samples, package/test scope and provider confirmation.

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Jul 2026 Technical Insights

How to Tape Out Your First ASIC Without a Foundry Account

A practical route from entity and eligibility review through NDA, PDK, run registration, signoff, final GDS acceptance and first-silicon delivery.

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Jul 2026 Technical Insights

Where Can I Manufacture a Small Batch of Custom Chips?

Compare MPW, prototype, multi-level-mask and dedicated-wafer routes for small-batch ASICs, including process fit, delivery form, packaging and test.

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