What Is MPW in Chip Tapeout?
MPW lets multiple chip projects share wafer or mask resources for prototype silicon. Overseas teams can start feasibility screening with high-level RFQ details before sharing design IP.
- →What is MPW?
- →When does MPW make sense?
- →What information is needed first?
- →What MPW is not
- →FAQ
What is MPW?
MPW stands for multi-project wafer. In an MPW run, multiple chip designs share wafer or mask resources so each team can prototype silicon without paying for a dedicated full-mask production route at the first step.
For overseas fabless teams, universities, research groups and industrial chip developers, MPW is usually a prototype path: a way to get measured silicon before committing to a dedicated full-mask or production route. It is especially relevant when the design is still being de-risked, when the required samples are limited, or when the team needs a credible path to discuss feasibility, timing and cost before sharing confidential design IP.
MPW is also commonly called shuttle tapeout or shared-reticle prototyping. The practical idea is the same: several projects share part of the manufacturing economics so early silicon access becomes more realistic.
When does MPW make sense?
MPW is most useful when a team needs real silicon but is not yet ready for a dedicated production mask set. Typical cases include analog and mixed-signal prototypes, RF and sensor interfaces, high-voltage or BCD concepts, industrial IoT chips, university research chips and early customer demonstration samples.
The common pattern is uncertainty. The team may know the target function and approximate die size, but still needs to confirm silicon behavior, package choice, probe strategy, shuttle timing, PDK/NDA path and cost drivers.
What information is needed first?
An early MPW RFQ does not need to start with confidential layout data. A useful first brief can include:
- target node or acceptable node range
- process family such as analog, mixed-signal, RF, BCD, high-voltage, eNVM or sensor interface
- estimated die area
- expected sample quantity
- packaging and wafer probe assumptions
- target timeline
- company country or region and end-use context
This outline is enough for an initial screen. Detailed design files should only move later, under the right NDA, PDK and partner-confirmed path.
What MPW is not
MPW is not a guarantee of manufacturing capacity, schedule or final price. A useful RFQ still needs process-fit review, compliance screening, partner confirmation and a clear understanding of downstream packaging, probe and test needs.
MST does not operate a wafer fab. MST coordinates mature-node MPW RFQs by screening outline requirements, clarifying the NDA and PDK path, and helping qualified requests move toward partner-confirmed feasibility and indicative quotation.
FAQ
Is MPW only for universities?
No. MPW is used by universities, fabless companies, design-service teams, research groups and industrial chip developers when prototype silicon is needed before a full production route.
Do I need to upload GDS to start an MPW RFQ?
No. The first screen can start from high-level requirements only. GDS, netlist, RTL and confidential design files should not be sent at intake.
Is MPW cheaper than a full-mask route?
Often for prototypes, yes, because shared wafer or mask resources reduce the early access cost. Final cost depends on node, die area, process options, packaging, test and schedule.
Start an MPW RFQ
Start with a high-level MPW brief: node range, process family, die area, sample quantity and timeline. No design IP is required at intake.
Submit an MPW RFQ or return to the MST mature-node MPW coordination hub.
Ready to scope your run?
Send node, process family, die area, volume and timeline - no design IP. We screen it, route to a qualified partner, and return an indicative quote.