HHGrace 成熟ノード MPW shuttle RFQ intake is open
MST Singapore は 2026 HHGrace 成熟ノード MPW shuttle schedule screening 向けの非機密 RFQ intake を受け付けています。海外 fabless、大学、研究チーム、産業向けチップ開発者が、process/node fit、NDA/PDK path、package/test scope、schedule target、formal quotation workflow に向けたレビュー可能な brief を準備できるよう支援します。 schedule window、availability、quotation は要件レビュー後に個別確認されます。
MST は成熟ノード MPW のテープアウト・製造調整デスクです。2026 HHGrace 成熟ノード shuttle screening では、非機密要件から開始し、レビュー可能なスコープを準備し、NDA/PDK と package/test の前提を整理し、適格プロジェクトが partner-confirmed schedule review、quotation、next steps へ進めるよう支援します。
HHGrace mature-node MPW platform intake table
This is the public schedule-screening entry for 2026 HHGrace mature-node MPW RFQs through MST Singapore. It is intentionally not a public price list or guaranteed shuttle calendar: exact run window, registration deadline, GDS/data-in deadline, PDK/NDA path, availability and quotation are confirmed case by case after requirement review.
Public 2026 platform and schedule-screening view
Use this table the same way a buyer would use a public MPW schedule page: identify the likely platform, then submit a non-confidential first brief so MST can check the current schedule window and quote path.
| Node | Platform | Fit | 2026 status | What to send first | RFQ |
|---|---|---|---|---|---|
| 90nm | Low-power BCD | BCD and power-management prototype requirements where voltage class, die area, package/test and samples need review. | 2026 RFQ screening open | Node target, voltage class, die estimate, sample count, package/test assumptions and target quarter. | Start RFQ → |
| 90nm | Embedded eFlash | Embedded non-volatile memory and mixed-signal prototype RFQs that can start from a non-confidential brief. | 2026 RFQ screening open | Memory/process need, die estimate, package/test assumptions, PDK/NDA status and target quarter. | Start RFQ → |
| 55nm | SiGe BiCMOS | RF, high-speed and mixed-signal prototype screening where process fit and package/test scope must be checked first. | 2026 RFQ screening open | RF/high-speed requirement, rough die size, frequency/use context, package/test assumptions and schedule target. | Start RFQ → |
| 55nm | Low-power BCD | Low-power BCD and power-management inquiries that need node, voltage, die-area, schedule and end-use review. | 2026 RFQ screening open | Voltage class, application context, die estimate, target samples and package/test assumptions. | Start RFQ → |
| 55nm | Logic / eFlash | Logic or embedded-Flash prototype needs where MST can prepare a reviewable RFQ before design-IP exchange. | 2026 RFQ screening open | Logic/eFlash need, die estimate, package/test assumptions, PDK/NDA status and preferred tapeout window. | Start RFQ → |
| 40nm | Logic / eFlash | 40nm logic, low-power or embedded-Flash prototype routes. Partner acceptance and schedule fit are required. | 2026 RFQ screening open | Node/process need, die estimate, package/test assumptions, target quarter, country and end-use context. | Start RFQ → |
設計ファイルを共有する前に始める
多くの初期MPW訪問者は、完全なtapeout packageを送れる段階ではありません。MSTは、アクセスルート比較、準備度確認、no-GDS brief作成、非機密RFQの手動レビューという4つの低リスク入口を提供します。
どのMPWルートが案件をレビューできるか比較する
最初の問題が設計準備度ではなく、どのルート、地域、適格性ゲート、NDA/PDKパス、レビューownerが依頼を扱えるかである場合、アクセスマップを使います。
access map を開く →依頼がレビュー可能か確認する
対象アプリケーション、おおよその node または process family、die size、sample 数、package/test assumptions、schedule pressure が分かる場合は readiness checker を使えます。
Readiness checker を開く →GDS なしの RFQ brief を作成
RFQ pack builder で、node、process family、die area、sample target、package/test assumptions、timeline、end-use context を非機密の first-screening brief に整理します。
RFQ brief を作成 → テンプレートをダウンロード ↓brief を MST screening に提出
process fit、package/test scope、NDA/PDK route、eligibility context、partner-review readiness の確認が必要な場合、非機密 brief を送信してください。
初回 brief を送信 →GDS なしの MPW brief から開始してください。
node range、process family、rough die area、sample target、package/test assumptions、timeline、end-use context を送ってください。MST は機密設計データを移動する前に readiness を確認します。
Practical guides before you submit an MPW RFQ
Use these pages when the project is not ready for full design-data exchange, but the team needs to understand what can be reviewed first.
Start an MPW RFQ without GDS
What to prepare before sharing layout files: node, process family, die estimate, samples, package/test assumptions, timeline and NDA/PDK status.
Read answer →What drives an MPW quote?
How wafer access, shared-reticle use, die area, package, wafer probe, final test, schedule and readiness gaps affect the quote path.
Read guide →MPW timeline and shuttle planning
How an outline RFQ moves through process-fit, NDA/PDK path, partner review, shuttle planning, package, probe and sample delivery.
Read answer →Who can screen HHGrace MPW requirements?
How to prepare a non-confidential HHGrace mature-node MPW brief before final route, quotation, schedule and NDA/PDK path are confirmed.
Read answer →MPW RFQ coordination services
MST は early mature-node prototype demand を partner-reviewable RFQ path に整理し、price、schedule、technical handoff の前に scope を明確にします。
reviewable MPW brief を構成
node range、process family、die-area estimate、sample target、timeline、application を受け取り、MST が process-fit、compliance、partner review 向けに initial brief を整理します。
Bring package, probe and test into scope
MST helps define package assumptions, wafer probe, characterization, sample quantity, reliability expectations and logistics needs early enough for a realistic RFQ.
Coordinate the next confirmed step
After the case is scoped, MST prepares the partner-review packet, clarifies NDA/PDK route requirements and coordinates the next practical step for your prototype program.
capacity を議論する前に foundry-review path を準備する
小規模チーム、海外企業、大学、初期 fabless project にとって難しいのは、foundry にメールを送ることだけではありません。project がどの access gate、eligibility review、PDK/NDA route、MPW window、capacity discussion に入れるかを見極めることです。MST は review 前に slot、price、schedule を約束せず、request を qualified review packet と partner-confirmed next step に整理します。
実際にレビューできる route を見つける
MST は buyer request を、foundry または qualified partner が最初に必要とする customer context、country/end-use、node range、process family、die estimate、sample target、package/test assumptions、timeline、requested response に翻訳します。
readiness 問題と access 問題を分ける
design readiness で止まる project もあれば、eligibility、PDK/NDA route、process assumptions の不足、review ownership の不明確さで止まる project もあります。MST は公開 intake で機密ファイルを求めずにそれらの gap を整理します。
capacity、package、test の議論に備える
MPW window と実際の capacity は、process fit、die area、package/test needs、review timing、partner confirmation に依存します。MST は wafer access、package、probe、test、samples、logistics を同じ first-review scope に入れます。
明確な partner-review packet を返す
MST は missing items、process-fit questions、NDA/PDK checklist、package/test checklist、risk notes、next-step owner を返し、曖昧なメールのままではなく qualified review に進めます。
MST が最初の相談先になる場面
full design-data exchange の前段階で、early chip idea を reviewable MPW path に変える必要があるとき MST が有効です。
You know the chip goal, but not the exact route
Use MST when you have an application, rough node range, process family, die-size estimate or customer deadline, but need help turning it into a reviewable MPW RFQ before design files move.
The project is more than plain digital CMOS
Analog, mixed-signal, RF, high-voltage, BCD, eNVM, sensor-interface and industrial-control ASIC ideas need process-family screening, not only a node name.
You need the prototype service chain scoped
MST helps bring package, wafer probe, characterization, sample logistics and post-MPW learning into the first review packet so the quote path is not wafer-only.
You need a path that respects geography and eligibility
For non-US, non-EU, university, design-service, startup and industrial teams, the first issue is often eligibility, NDA/PDK route, export context and commercial handoff.
MPW RFQ の進み方
高レベル brief からパートナー確認後の次ステップまでの 5 ステップ。先に手動レビュー、設計 IP は後です。
intake
高レベル要件のみ。ノード、プロセスファミリ、die 面積、数量、時期。GDS、netlist、RTL は不要です。
プロセス適合確認
要件が実在する成熟ノードまたは特殊プロセスに対応するか確認し、手動レビューが必要な点を明確にします。
PDK / NDA 経路
適合が見えた後、設計詳細が契約下でのみ交換されるよう NDA と PDK の経路を設定します。
パートナー確認
適格パートナーが案件ごとの実現性、可用性、スケジュールを確認します。最初から仮定しません。
パートナー確認後の次ステップ
レビュー後に、パートナー確認済みの次ステップ、商務前提、または見積経路を受け取ります。続行するまでコミットはありません。
MST が MPW 要件を brief から製造レビューへ進める方法。
このサービスは、非機密 intake、process/node fit、NDA/PDK 準備、package/probe/test scope、partner または fab への提出調整、見積確認、tapeout フォロー、製造進捗コミュニケーション、サンプル納入調整を対象にします。
Structure the first MPW requirement
Convert free-text emails or form notes into a clean RFQ brief covering node range, process family, die-area estimate, sample target, package/test assumptions, timeline and end-use context.
Prepare process and PDK questions
Map the brief against analog, mixed-signal, RF, BCD, high-voltage, sensor and eNVM patterns, then surface the partner questions needed for process fit, NDA route and PDK access.
Scope the full prototype path
Turn die size, pad count, package preference, probe needs, characterization goals and sample logistics into a package/probe/test checklist before the RFQ is routed.
Create a partner-ready decision packet
Summarize open gaps, inconsistent assumptions, schedule risks and commercial questions so MST can route the case and return a clearer next step.
対応範囲
目安となるプロセス範囲です。最終ノードとプロセスは適格パートナーが案件ごとに確認します。
MPW 計画に使えるツール
RFQ 送信前に、共有 reticle 計画、gross/good die 推定、ローカル GDS メタデータ確認、コスト分担比較、高レベルパラメータから RFQ リンク生成ができます。すべてブラウザ内で動作し、GDS ツールはファイルをアップロードしません。RFQ intake も非機密サマリのみです。
すべてのツールを見る →3 ステップ MPW 適合チェック
プロセス、プロトタイプ範囲、コンプライアンス境界に関する高レベル質問に答え、非機密回答を入力済みの MPW RFQ フォームを開きます。
準備度チェックを開く →MPW Reticle & Wafer Planner
Pack several projects into one shared reticle, step it across the wafer, estimate gross/good dies and each project area-based cost share.
Open planner →MPW プロトタイプ費用推定
Estimate gross dies per wafer, shared-reticle utilization, indicative mature-node cost range, shuttle timing and tapeout readiness.
Open estimator →ローカル GDSII Inspector
Inspect a .gds file fully in your browser: top cell, die size, layers, cell tree and element counts. Nothing is uploaded - use the metadata to build a non-confidential RFQ summary.
Open GDS inspector →非欧米チーム向け MPW Access Map
MOSIS、Europractice、Muse、IMEC などの MPW ルートを、出典付きで中立的に比較します。米国/EU 以外のチームが実際に利用できる経路に焦点を当てます。
access map を開く →MPW はプロトタイプシリコンのサービスチェーンの一部です
海外チームは wafer run だけでなく、パッケージ、wafer probe、final test 計画、サンプル物流、procurement 支援を早い段階で定義する必要があります。
曖昧な製造相談をレビュー可能な RFQ に変換
機密設計交換の前に、ノード範囲、プロセスファミリ、概算 die 面積、サンプル数、目標時期、最終用途を整理します。
パッケージ、wafer probe、評価範囲を定義
パッケージ仮定、die サイズ、pad 数、サンプル数、テスト範囲、信頼性期待値は、正式見積経路の前に見える化すべきです。
ルート、価格、時期、制約を案件ごとに確認
MST は RFQ ルートを調整しますが、最終能力、商条件、タイムライン、受入条件は適格パートナー確認が必要です。
商務手続き、サンプル、sourcing ニーズを調整
ルート確認後、MST は PI/支払い、サンプル発送コミュニケーション、BOM、テストアクセサリ、小ロット sourcing を支援できます。
MPW ガイドと事例
Full tapeout package が未完成でも、reviewable MPW brief を準備するための実務ガイドです。
0.35um-40nm mature-node scoping
How to describe node range, specialty process options and partner-confirmed feasibility.
ガイドを読む →Readiness, PDK, NDA, cost and timeline
A practical checklist from outline RFQ to NDA/PDK path, cost drivers and shuttle planning.
ガイドを読む →Analog, BCD, high-voltage and RF MPW
How to scope voltage, RF, passives, BCD, package and test needs before partner review.
ガイドを読む →Packaging, wafer probe and test
Why probe, package, sample quantity, reliability and logistics belong in the first RFQ.
ガイドを読む →MPW 詳細ガイド
設計 IP や GDS handoff の前に、reviewable かつ non-confidential な MPW brief を準備するための記事です。
Where Can Overseas Teams Start a Mature-Node MPW RFQ Before Sharing GDS?
A practical first-step guide for non-US, non-EU, university, design-service and industrial chip teams that need a safe outline-first MPW path.
ガイドを読む →Multi-Project Wafer (MPW) Shuttle: first silicon 完全ガイド
共有 reticle MPW、first silicon 計画、design handoff、非機密 intake 境界を説明する総合ガイド。
ガイドを読む →What Is MPW in Chip Tapeout?
A concise answer for teams learning how shared-wafer prototype silicon differs from a dedicated production mask route.
ガイドを読む →MPW vs Full Mask: Which Tapeout Route Should You Choose?
A decision guide comparing prototype learning, cost, schedule control, design maturity and later production readiness.
ガイドを読む →チップ tapeout 費用はいくらか: MPW と full mask
How mask set, die size, wafer quantity, packaging, probe and schedule assumptions change early cost conversations.
ガイドを読む →MPW Tapeout Cost: What Drives the Quote?
A more RFQ-focused cost guide covering node, process options, die area, shared-reticle utilization, package, probe, test and schedule.
ガイドを読む →How to Tapeout a Chip: First Silicon Checklist
A first-silicon checklist covering specification, PDK/NDA path, verification, GDS/OASIS readiness and RFQ scope.
ガイドを読む →PDK, NDA and GDS: What Happens Before MPW Tapeout?
Why the first RFQ should not require design files, and how high-level screening should precede controlled PDK and GDS exchange.
ガイドを読む →MPW Timeline: From Outline RFQ to Shuttle Planning
A schedule map from outline RFQ, process-fit and NDA/PDK path to shuttle planning, wafer run, package, probe, test and logistics.
ガイドを読む →How MST Prepares a Foundry-Review Packet for Mature-Node MPW
The structured non-confidential packet MST prepares before qualified partner review, including process fit, NDA/PDK path, package/test scope and requested response.
ガイドを読む →Asia Mature-Node MPW RFQ Path: What Can Be Discussed Before NDA?
A safe disclosure guide for Asia mature-node RFQs: what can be discussed publicly and what waits for NDA and partner-confirmed route review.
ガイドを読む →MPW Readiness Report Example: What MST Checks Before Partner Review
A sample report structure for intake completeness, process fit, NDA/PDK path, package/test scope, compliance context and next-step scoring.
ガイドを読む →MPW Readiness Checker: What to Review Before Partner RFQ
How to use MST's readiness checker to turn an early prototype request into a structured gap list before partner RFQ.
ガイドを読む →MPW RFQ Pack Builder: How to Prepare a No-GDS First Brief
A practical guide to preparing a non-confidential MPW first brief covering process, die area, package, test, timeline and end use.
ガイドを読む →GDS/OASIS Handoff Manifest: What to Inventory Before Controlled Delivery
What to inventory before controlled GDS/OASIS delivery after NDA, PDK context and route instructions are clear.
ガイドを読む →PDK and Foundry Requirement Checklist Before MPW Review
How to separate public planning questions from NDA-gated PDK, DRC/LVS, package/test and route-review requirements.
ガイドを読む →MPW Prototype Estimator: Die Count, Cost Drivers and RFQ Readiness
How to interpret early die-count and cost-driver estimates before partner-confirmed MPW review.
ガイドを読む →Sample MPW Readiness Report for a 180nm Mixed-Signal Prototype
An illustrative, non-confidential sample report showing readiness score, process-fit questions, package/test gaps and next steps.
ガイドを読む →Sample Foundry-Review Packet for Mature-Node MPW
An illustrative, non-confidential partner-review packet covering customer context, process request, package/test scope and requested response.
ガイドを読む →Sample No-GDS MPW RFQ Brief: What to Send First
A public-intake example showing what overseas teams can send first without sharing GDS, PDK files or design IP.
ガイドを読む →GDSII, DRC and LVS Requirements for MPW Tapeout
What design-rule checks and layout handoff items matter later, while MST intake still begins without design IP.
ガイドを読む →Sky130 and Open-Source Silicon MPW Options After eFabless
A context guide for open-source silicon routes and how they differ from partner-confirmed commercial MPW review.
ガイドを読む →Asia MPW Access: What Overseas Fabless Teams Should Prepare
Preparation notes for overseas teams comparing Asia-friendly MPW routes, documentation and partner access gates.
ガイドを読む →米国以外・非アカデミックチーム向け MOSIS / Europractice 代替
A practical comparison frame for teams that may not fit US, EU or university-focused shuttle access programs.
ガイドを読む →MPW ノード選択: 0.35um、180nm、65nm、40nm、28nm
How to frame mature-node and advanced-edge requests before a partner confirms real process fit and schedule.
ガイドを読む →MPW から engineering run と量産へ
What changes after first silicon, including validation, package/test planning, engineering runs and production risk.
ガイドを読む →FPGA to ASIC: When a Prototype Should Move Toward MPW
A decision guide for teams moving from programmable prototypes toward ASIC feasibility and first-silicon planning.
ガイドを読む →How Many Dies Do You Get from an MPW Shuttle?
How wafer diameter, reticle use, die size, scribe lanes, yield assumptions and packaging needs affect die counts.
ガイドを読む →MPW projects が idea から first silicon へ進む流れ。
価格、スケジュール、パートナー経路を相談する前に、この概要で MPW サービスチェーンを確認してください。
The MPW chain has more than a wafer run
A real prototype path usually moves through requirement brief, process fit, NDA/PDK route, design signoff, shuttle schedule, tapeout package, wafer run, dicing, packaging, wafer probe, final test, sample logistics and first-silicon learning.
The middle layer removes ambiguity
MST は曖昧な製造要件を reviewable brief に変換し、欠けている範囲を特定し、パートナー向けの確認質問を準備し、商務ステップを調整します。
The bottlenecks are usually outside the wafer price
Common bottlenecks include unclear process fit, PDK/NDA access, late package/test planning, missing die or pad assumptions, schedule uncertainty, eligibility gates, cross-border payment and sample logistics.
Preparation tools は partner review 前後で最も有効
tools は RFQ input の normalization、missing process questions、quote readiness score、package/test checklists、partner-review packet summary、post-MPW evidence organization を支援します。
商務範囲はプロジェクト作業に応じて決まります
レビュー済み MPW path には、RFQ screening、technical coordination、document preparation、package/test/sourcing coordination、partner routing、project follow-up が含まれる場合があります。範囲は案件ごとに確認します。
MST が整理する課題
多くのチームは、eligibility、real total cost、package/test options、schedule risk、安全な no-IP intake の比較で迷います。MST はこれらの質問をより明確な初回 RFQ path に整理します。
What a reviewable MPW packet looks like
These are illustrative, non-confidential examples. They show the level of scope MST needs for first screening and what remains for NDA-controlled review.
180nm mixed-signal sensor ASIC
Customer provides: Customer provides target node range, analog/mixed-signal function, rough die area, sample count, package preference, measurement goal and end-use context.
MST returns: MST returns missing questions, possible process-family fit, package/probe/test checklist, NDA/PDK route notes and partner-review readiness.
Later controlled path: GDS, schematics, netlist, PDK files and detailed circuit implementation stay out of the public intake and move only after the controlled path is clear.
350nm high-voltage / BCD prototype
Customer provides: Customer provides voltage class, device-option assumptions, pad/package direction, die-size range, safety or industrial-control use case, target samples and timeline.
MST returns: MST flags process-fit uncertainty, required partner questions, packaging and reliability assumptions, compliance context and quote-readiness gaps.
Later controlled path: Exact device stack, proprietary circuit detail, layout files and partner-specific design rules wait for NDA/PDK and qualified technical review.
65/55nm RF or eNVM feasibility inquiry
Customer provides: Customer provides RF band or memory need at a non-confidential level, acceptable node range, rough die area, package/test assumptions and schedule pressure.
MST returns: MST separates public planning questions from NDA-gated questions and prepares a partner-review packet focused on feasibility, access path and missing assumptions.
Later controlled path: Model files, IP blocks, proprietary layout, performance-sensitive schematics and process-specific data belong in the later controlled exchange.
良い MPW RFQ と悪い MPW RFQ
レビュー可能な RFQ はプロセス適合確認に十分具体的でありながら、非機密である必要があります。不明な場合は安全な版から始めてください。
良い初回 RFQ
- Target node or range, such as 180nm BCD, 350nm high-voltage, 65/55nm RF, or not sure.
- Process family, estimated die-area range, target tapeout window and prototype sample quantity.
- Packaging, wafer probe, characterization, sample destination and end-use context.
- PDK/NDA status and whether you need partner-confirmed next steps before sharing design details.
Move design detail after the review path is clear
- GDS, OASIS, netlists, RTL, source code, PDK files and proprietary schematics belong in the later NDA-controlled path.
- Exact slot availability, schedule and price are reviewed against a scoped case instead of guessed from a one-line request.
- Export, customer, country and end-use context should be visible early so the right review route is selected.
- If you only know the target application and rough node, MST can help turn that into the first checklist.
信頼できる MPW desk は最初の会話を保護します。
目的は、buyers に sensitive design assets を早く出させずに early review を容易にすることです。これが MST MPW coordination の public operating boundaries です。
よくある質問
brief 送信前にエンジニアや procurement チームがよく聞く質問です。
MPWから初回シリコンまでの経路を計画しますか？
ノード／プロセス適合、希望日程、初回シリコン評価、パッケージ／テスト、サンプルハンドリング、リスピン要件を非機密の概要から共有してください。MSTがレビュー経路へ振り分け、実現可能性、可用性、日程、見積もりは案件ごとに確認します。